Intel introduced a new technology with select Merom processors; Dynamic Acceleration technology. Find out exactly what it does below. You'll also find a complete processor support list for this technology on this page.

Intel Dynamic Acceleration technology (IDA) can be considered to be the very first iteration of Intel's modern Turbo Boost feature found in current Core i5 and Core i7 processors. It was introduced in April 2007 with Intel's Core2 Duo laptop processors, also known by the codename of Merom. The feature was also carried over to Merom's successor, Penryn.

The technology was slightly improved when the Core2 Quad laptop processors were released. IDA for these processors is renamed to Intel Dual Dynamic Acceleration (IDDA) as it works a little differently.

Not all Merom or Penryn laptop processors support the technology. To take advantage of this technology, your laptop must be using a processor that supports the feature, in conjunction with a compatible chipset and the laptop's BIOS must also support the feature and have it enabled.

The technology was created to allow modern Intel multi-core processors to provide better performance in single-threaded workloads. Such workloads include most games and software designed to run on legacy hardware.

In dual-core processors, IDA works by disabling one core, and simultaneously gives the other active core a slight frequency boost. The boost is achieved by increasing the clock multiplier by 1. The front-side bus data transfer rate is left untouched.

In quad-core processors, IDDA instead disables two cores, and provides a slight frequency boost to the other two active cores. This means that a slight improvement in performance can be seen with workloads that balance well on two cores. Like IDA, the boost is achieved by increasing the clock multiplier by 1, while the front-side bus data transfer rate remains the same.

Modern Intel Turbo Boost technology works in the same way, but instead assigns dedicated clock multiplier settings to each core, rather than core pairs.

For dual-core processors, this can be demonstrated by using the Core2 Duo T9300 as an example.

First, we grab two essential pieces of information from the processor specifications — the core frequency CORE_MHZ, and the front-side bus data transfer rate FSB_DTR. From these two figures, we can calculate the front-side bus base clock frequency FSB_BCLK required for the next step. This is achieved by dividing the data transfer rate by four, because the front-side bus used by Merom and Penryn processors can transfer data four times per second.

Now that we have the front-side bus base clock frequency, we can use it to determine the clock multiplier CLK_MUL used by this processor to achieve its 2.50 GHz core frequency. Dividing the core frequency CORE_MHZ by the front-side bus base clock frequency FSB_BCLK will yield the multiplier figure.

The final stage is to calculate the IDA clock multiplier IDA_CLK_MUL and the IDA frequency IDA_MHZ, applied to a single core when the other is disabled. This is achieved by adding 1 to the clock multiplier CLK_MUL, and multiplying it by the front-side bus base clock frequency FSB_BCLK.

The core frequency for the Core2 Duo T9300 while operating in Intel Dynamic Acceleration mode, is 2.70 GHz. This applies only to a single core, while the second is disabled in this mode.

For quad-core processors, this can be demonstrated by using the Core2 Quad Q9100 as an example.

First, we grab two essential pieces of information from the processor specifications — the core frequency CORE_MHZ, and the front-side bus data transfer rate FSB_DTR. From these two figures, we can calculate the front-side bus base clock frequency FSB_BCLK required for the next step. This is achieved by dividing the data transfer rate by four, because the front-side bus used by Merom and Penryn processors can transfer data four times per second.

Now that we have the front-side bus base clock frequency, we can use it to determine the clock multiplier CLK_MUL used by this processor to achieve its 2.27 GHz core frequency. Dividing the core frequency CORE_MHZ by the front-side bus base clock frequency FSB_BCLK will yield the multiplier figure.

The final stage is to calculate the IDDA clock multiplier IDDA_CLK_MUL and the IDDA frequency IDDA_MHZ, applied to two cores when the other two are disabled. This is achieved by adding 1 to the clock multiplier CLK_MUL, and multiplying it by the front-side bus base clock frequency FSB_BCLK.

The core frequency for the Core2 Quad Q9100 while operating in Intel Dual Dynamic Acceleration mode, is 2.53 GHz. This applies only to two cores, while the other two are disabled in this mode.